La-j951p Schematic New! (2024)

You can find the comprehensive 46-page engineering document, which includes the power sequence diagrams, logical diagrams, and peripheral schematics, at the following sources: : A detailed LA-J951P Power Sequence Diagram

Typical file names to look for:

The LA-J951P uses several PWM (Pulse Width Modulation) controllers to generate main voltages. A common fault on these boards is a short circuit on a secondary rail. The schematic identifies the coil (inductor) and the PWM chip responsible for that rail. la-j951p schematic

Unified Memory Architecture (UMA) using integrated Intel UHD Graphics.

| Rail Name | Voltage | Source IC | Typical Use | | :--- | :--- | :--- | :--- | | | 0.65V–1.35V | NCP81215 | CPU Vcore (IMVP8) | | +VCC_GT | 0.65V–1.25V | NCP81215 | iGPU Graphics | | +VCC_SA | 0.95V–1.05V | SY8288B | System Agent | | +VBAT | 11.1V–16.8V | BQ24780S | Main battery input | | +VCC_GFXCORE | 0.65V–1.35V | MP2888A | NVIDIA GPU core | | +3VALW | 3.3V | TPS51285B | Always-on (S5 state) | | +5VALW | 5V | TPS51285B | Always-on | You can find the comprehensive 46-page engineering document,

This flow chart illustrates the exact order in which voltage rails (like +3VALW, +5VALW, and +VCC_CORE) must activate for the laptop to boot.

Integrated Intel Core i3/i5/i7 (Ice Lake platform). Memory Support: Dual-channel DDR4 SO-DIMM slots. Unified Memory Architecture (UMA) using integrated Intel UHD

If you are searching for the , you likely fall into one of three categories:

Last updated: October 2025 – This guide will be updated as new boardview revisions are released.